Labels:text | number | font | diagram | screenshot | parallel OCR: ADSP3 ADSP2 ADSP1 ADSPO MP OCR VC L' G L G LG LG C/D 1 - 1 32 64 32 64 32 64| 32 64| 32 32 732 132 pole IEEE- 1149.1 64 $32| (JTAG) 64 TO Data RAMO Data RAM1 Data RAMO Data RAM2 Data RAM1 Data RAMO Data RAM1 Data Cache Data RAM2 Data Cache Data RAM1 "Data RAM2 Data RAM2 Parameter RAM Parameter RAM Parameter RAM Parameter RAM Instruction Cache Instruction Cache Instruction Cache Instruction Cache Instruction Cache Instruction Cache Parameter RAM Data RAMO Figure 1: MVP architecture overview.
